Delta-sigma modulators are electronic circuits for performing analog-to-digital conversion, digital-to-analog conversion, or digital-to-digital conversion. For example, an analog-to-digital converter (ADC) may convert an analog signal, such as an audio signal, into a digital signal comprising 1's and 0's for processing by digital logic circuitry. Because many consumer-oriented and other electronic device include digital circuitry, such as microprocessors, that performs processing only on digital signals, an analog-to-digital converter (ADC) is an important component of an electronic device. ADCs generally cannot perfectly convert an analog signal into a digital signal. Imperfections in the conversion result in errors in later processes that make use of the digital signal. For example, an audio signal from a microphone may be passed to an analog-to-digital converter (ADC), which converts the audio signal into a digital signal, that digital signal may be provided to a microprocessor for processing, and back to a digital-to-analog converter (DAC) for output to a speaker. The quality of a sound reproduced at the speaker in comparison to the quality of the signal received at the microphone is proportional to the accuracy of the ADC and the DAC.
Some conventional ADCs are based on RC integrator circuits or switched capacitor circuits. However, these types of ADCs generally require higher power, larger die area, and larger voltage headroom to design and manufacture. Available headroom in integrated circuit (IC) design and manufacturing is generally decreasing over time as IC manufacturing allows the size of transistors that make up those ICs to shrink to smaller and smaller sizes. This is because the supply voltage of ICs generally decreases proportional to the size of the transistors. As the supply voltage decreases, any margin of error, or headroom, available decreases as well.
VCO-based ADCs are beneficial, in one example, in electronic devices with low operating voltages. A VCO receives an input analog signal and outputs another analog signal, but the output analog signal has a parameter that is varied by the VCO proportional to the input analog signal. For example, a VCO may receive an input signal Vin that has a voltage that varies over time. An output of the VCO may be a signal with a frequency component fVCO that varies proportional to the voltage of the input signal Vin. Thus, the varying input voltage of Vin is translated to a varying frequency fVCO by the VCO.
One such VCO-based ADC is shown in FIG. 1A. FIG. 1A is a block diagram illustrating an example of a conventional VCO-based delta-sigma modulation analog-to-digital converter (ADC). An ADC 100 may include a VCO 102 that receives input signal Vin. The output of the VCO 102 is provided to a phase quantizer 104, which outputs a digital signal based on a phase of the output of the VCO 102. A rate of change of the phase of the VCO 102 output varies in relation to the frequency of the VCO 102 output. That digital signal from quantizer 104 is then provided to a differentiator 106. The differentiator 106 provides first-order noise shaping on quantization noise added by the ADC 100. However, there is no noise shaping of the input signal VIN. Rather, the input to output transfer function of ADC 100 is approximately one.
Some problems with the ADC 100 occur when the input signal Vin exceeds a certain range. As shown in graph 108, an output of the VCO 102, fVCO, is graphed against the input signal Vin. An ideal behavior for a VCO 102 is linear behavior, which occurs in the middle of the curve in graph 108. At the edges of the line in graph 108, non-linear behavior in the VCO 102 occurs. If an input signal Vin enters these ranges, the digital signal representation of the analog signal becomes distorted. In addition to the non-linearity of the VCO 102 that are exposed to the input signal Vin the ADC 100 is only of a single order.
One conventional VCO-based ADC improves upon this situation by converting the input signal Vin to a pulse width modulated (PWM) signal prior to the VCO. FIG. 1B is a block diagram illustrating an example of a conventional VCO-based delta-sigma analog-to-digital converter (ADC) in which the input to the VCO is a pulse width modulation input. An ADC 110 includes an asynchronous delta-sigma modulator (ADSM) 112 coupled before the VCO 102, the phase quantizer 104, and the differentiator 106. The output of the ADSM 112 is a square wave signal with a fixed peak-to-peak voltage. The peaks of the square wave signal are selected to be at distant edges of the line in graph 108. Thus, the VCO 102 only receives as an input signal one of two voltages. Because it only receives two voltages, the VCO 102 by definition exhibits linear behavior because the only graph that can be completely represented with two points is a line. Although the use of ADSM 112 may prevent the VCO 102 from experiencing non-linearity, the problem is only moved to the ADSM 112. Further, the ADSM 112 is an additional component to manufacture, and the ADC 110 is still only of a single order.
Another conventional solution to the problem of the non-linearity in the VCO-based ADC of FIG. 1A is to implement a negative feedback loop. FIG. 1C is a block diagram illustrating an example of a conventional VCO-based delta-sigma analog-to-digital converter (ADC) having a negative feedback loop. An ADC 120 includes a negative feedback loop 126 from the output of the phase quantizer 104 to a subtractor 122. The feedback loop 126, which starts as a digital signal at the output of the phase quantizer 104, may be converted to an analog signal by DAC 124 for input to the subtractor 122. The subtractor 122 produces an error signal for input to the VCO 120, and that error signal generally has a smaller peak-to-peak voltage than that of the input signal Vin when a DAC 124 is a multi-bit DAC, and the amplitude of that error signal may also be proportional to resolution of the DAC 124. Thus, referring back to the line in graph 108 of FIG. 1A, it is much more likely that the input provided to the VCO 102 remains in the linear region of graph 108. Although the use of negative feedback loop 126 can improve the output of ADC 120, the ADC 120 is still only of a first order.
Higher order noise-shaping improves the quality of an ADC by better attenuating noise in the input signal. Thus, higher order delta-sigma modulation in an ADC is desirable. However, higher orders than first order VCO-based ADCs have not been designed. In fact, cascading VCO together to obtain higher order modulation would not be feasible. Because the VCO converts analog voltage to phase information, a second VCO cannot be coupled to the output of the first VCO, because the output of the first VCO is not the analog voltage information needed at the second VCO. Although additional circuitry could be implemented to convert the phase output of the first VCO to an analog voltage for the second VCO, such additional circuitry would make the resulting converter undesirable due to size and power consumption.
Shortcomings mentioned here are only representative and are included simply to highlight that a need exists for improved electrical components, particularly for ADCs employed in consumer-level devices, such as mobile phones. Embodiments described herein address certain shortcomings but not necessarily each and every one described here or known in the art.